The pulse domain (also known as the time domain) is becoming a more and more desirable domain for information encoding and/or transfer. In the analog domain signals are typically represented by both their amplitudes and shapes. In the digital domain, signals represent binary numbers and the intervals between the 1's and 0's of the digital information is typically regulated by a clock in the digital domain. The digital domain has both advantages and disadvantages compared to the analog domain. The digital domain is resistant to amplitude excursions which hamper the analog domain, but a digital domain signal is typically just an approximation of a corresponding analog signal. Information can be lost when an analog signal is digitized.
In contrast, in the pulse domain information (data) is encoded by pulses and it is the interval between successive pulses (and not their amplitudes) which encodes the information (data) being conveyed by a pulse domain signal. So a pulse domain signal has certain advantages over signals in either the digital or analog domains.
The present invention relates to a demultiplexer which demultiplexes a pulse domain signal applied thereto. The disclosed invention in it preferred embodiments utilizes circuits which are used in the prior art in the digital domain and therefore are typically regulated by a clock to transfer data from one gate of a circuit to a following gate. In the disclosed preferred embodiments the data is encoded by the timing of the pulses and therefore the gate operate asynchronously in the disclosed embodiments.
Additionally, with the increasing demands of low supply voltage and small feature size in modern semiconductor process technology used to make various circuits and gates, this inevitably introduces analog circuit design challenges, of which the limited voltage headroom and process-voltage-temperature (PVT) variation are the most noticeable ones. These analog circuit design challenges can impact the asynchronous circuits and gates used in the pulse domain. In the prior art, to combat these challenges, circuit design has trend to be digital-centric which uses a few analog circuits as reasonably possible.
However, researchers have been seeking an alternative domain to the analog domain which uses voltage amplitude (or similarly, the amount of current) to convey signal information. Several time-domain signal processing theories and algorithms, which utilize a voltage-to-time converter to transfer amplitudes (voltages) of input signals into either pulse-widths (in the pulse domain) or widths between spikes (spike domain) of a constant-amplitude asynchronous pulse train at outputs, and recovery the original input signals from the pulse domain or spike domain information, have been investigated and proposed.
When dealing with high speed/large input signals, the voltage-to-time converter has to run at high speed and generate the asynchronous pulse train outputs at high switching rates, which may not be processed directly by the following time-to-digital converter due to the semiconductor process limits noted above. Therefore, a pulse de-multiplexer that can extract all the pulse-widths of a high speed asynchronous pulse train into multiple relatively low speed channels to compensate the circuits speed gap in between the voltage-to-time converter and time-to-digital converter will be extremely useful and practical for the realization of time-domain signal processing theories and algorithms. This invention serves the purpose of such a pulse domain de-multiplexer.